View source for B(0x04) enable timer irq

 000016e4: 3c020000 lui r2,0x0000
 000016e8: 3084ffff andi r4,r4,0xffff            # timer
 000016ec: 8c426d40 lw r2,0x6d40(r2)             # 1f801070 IRQ mask register
 000016f0: 00047880 sll r15,r4,0x02
 000016f4: 3c180000 lui r24,0x0000
 000016f8: 030fc021 addu r24,r24,r15
 000016fc: 8f186d48 lw r24,0x6d48(r24)           # load flag for timer to enable interrupt
 00001700: 8c4e0004 lw r14,0x0004(r2)            # IRQ mask value
 00001704: 28810003 slti r1,r4,0x0003
 00001708: 01d8c825 or r25,r14,r24               # mask in
 0000170c: 14200003 bne r1,r0,0x0000171c         #
 00001710: ac590004 sw r25,0x0004(r2)            # restore to IRQ mask
 00001714: 03e00008 jr r31                       # IF VBLANK, RETURN 0
 00001718: 00001021 addu r2,r0,r0
 0000171c: 24020001 addiu r2,r0,0x0001           # if not VBLANK, RETURN 1
 00001720: 03e00008 jr r31
 00001724: 00000000 nop