Difference between revisions of "SPU DMA set timing override 0"
Jump to navigation
Jump to search
(Created page with "<font face='Courier New'> 0001934c: 3c048003 lui r4,0x8003 00019350: 8c84ad58 lw r4,-0x52a8(r4) 00019354: 3c03f0ff lui r3,0xf0ff 00019358: 8c820000 lw r2,0x0000(r4) 000...") |
|||
| Line 2: | Line 2: | ||
0001934c: 3c048003 lui r4,0x8003 | 0001934c: 3c048003 lui r4,0x8003 | ||
| − | 00019350: 8c84ad58 lw r4,-0x52a8(r4) | + | 00019350: 8c84ad58 lw r4,-0x52a8(r4) # SPU delay size |
00019354: 3c03f0ff lui r3,0xf0ff | 00019354: 3c03f0ff lui r3,0xf0ff | ||
| − | 00019358: 8c820000 lw r2,0x0000(r4) | + | 00019358: 8c820000 lw r2,0x0000(r4) # read |
| − | 0001935c: 3463ffff ori r3,r3,0xffff | + | 0001935c: 3463ffff ori r3,r3,0xffff # 0xf0ff ffff |
| − | 00019360: 00431024 and r2,r2,r3 | + | 00019360: 00431024 and r2,r2,r3 # disable existing DMA timing override |
| − | 00019364: 3c032000 lui r3,0x2000 | + | 00019364: 3c032000 lui r3,0x2000 # enable use dma timing override & set timing override to 0 |
00019368: 00431025 or r2,r2,r3 | 00019368: 00431025 or r2,r2,r3 | ||
| − | 0001936c: ac820000 sw r2,0x0000(r4) | + | 0001936c: ac820000 sw r2,0x0000(r4) # set control register again |
00019370: 03e00008 jr r31 | 00019370: 03e00008 jr r31 | ||
00019374: 00000000 nop | 00019374: 00000000 nop | ||
</font> | </font> | ||
Revision as of 00:57, 22 January 2025
0001934c: 3c048003 lui r4,0x8003 00019350: 8c84ad58 lw r4,-0x52a8(r4) # SPU delay size 00019354: 3c03f0ff lui r3,0xf0ff 00019358: 8c820000 lw r2,0x0000(r4) # read 0001935c: 3463ffff ori r3,r3,0xffff # 0xf0ff ffff 00019360: 00431024 and r2,r2,r3 # disable existing DMA timing override 00019364: 3c032000 lui r3,0x2000 # enable use dma timing override & set timing override to 0 00019368: 00431025 or r2,r2,r3 0001936c: ac820000 sw r2,0x0000(r4) # set control register again 00019370: 03e00008 jr r31 00019374: 00000000 nop
