Difference between revisions of "SPU DMA set timing override 2"
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(Created page with "<font face='Courier New'> 00019378: 3c048003 lui r4,0x8003 0001937c: 8c84ad58 lw r4,-0x52a8(r4) 00019380: 3c03f0ff lui r3,0xf0ff 00019384: 8c820000 lw r2,0x0000(r4) 000...") |
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00019378: 3c048003 lui r4,0x8003 | 00019378: 3c048003 lui r4,0x8003 | ||
| − | 0001937c: 8c84ad58 lw r4,-0x52a8(r4) | + | 0001937c: 8c84ad58 lw r4,-0x52a8(r4) # SPU delay size |
00019380: 3c03f0ff lui r3,0xf0ff | 00019380: 3c03f0ff lui r3,0xf0ff | ||
| − | 00019384: 8c820000 lw r2,0x0000(r4) | + | 00019384: 8c820000 lw r2,0x0000(r4) # read |
| − | 00019388: 3463ffff ori r3,r3,0xffff | + | 00019388: 3463ffff ori r3,r3,0xffff # 0xf0ff ffff |
| − | 0001938c: 00431024 and r2,r2,r3 | + | 0001938c: 00431024 and r2,r2,r3 # disable existing DMA timing override |
| − | 00019390: 3c032200 lui r3,0x2200 | + | 00019390: 3c032200 lui r3,0x2200 # enable use dma timing override & set timing override to 2 |
00019394: 00431025 or r2,r2,r3 | 00019394: 00431025 or r2,r2,r3 | ||
| − | 00019398: ac820000 sw r2,0x0000(r4) | + | 00019398: ac820000 sw r2,0x0000(r4) # set control register again |
0001939c: 03e00008 jr r31 | 0001939c: 03e00008 jr r31 | ||
000193a0: 00000000 nop | 000193a0: 00000000 nop | ||
</font> | </font> | ||
Revision as of 00:56, 22 January 2025
00019378: 3c048003 lui r4,0x8003 0001937c: 8c84ad58 lw r4,-0x52a8(r4) # SPU delay size 00019380: 3c03f0ff lui r3,0xf0ff 00019384: 8c820000 lw r2,0x0000(r4) # read 00019388: 3463ffff ori r3,r3,0xffff # 0xf0ff ffff 0001938c: 00431024 and r2,r2,r3 # disable existing DMA timing override 00019390: 3c032200 lui r3,0x2200 # enable use dma timing override & set timing override to 2 00019394: 00431025 or r2,r2,r3 00019398: ac820000 sw r2,0x0000(r4) # set control register again 0001939c: 03e00008 jr r31 000193a0: 00000000 nop
