Difference between revisions of "Apply status (to action)"
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m (Fix comment spacing) |
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00187f38: afb200b8 sw r18,0x00b8(r29) | 00187f38: afb200b8 sw r18,0x00b8(r29) | ||
00187f3c: afb100b4 sw r17,0x00b4(r29) | 00187f3c: afb100b4 sw r17,0x00b4(r29) | ||
− | 00187f40: 30620020 andi r2,r3,0x0020 | + | 00187f40: 30620020 andi r2,r3,0x0020 ; Check for 'Separate' |
00187f44: 1040000b beq r2,r0,0x00187f74 | 00187f44: 1040000b beq r2,r0,0x00187f74 | ||
00187f48: afb000b0 sw r16,0x00b0(r29) | 00187f48: afb000b0 sw r16,0x00b0(r29) | ||
Line 17: | Line 17: | ||
00187f58: 8482002a lh r2,0x002a(r4) | 00187f58: 8482002a lh r2,0x002a(r4) | ||
00187f5c: 00000000 nop | 00187f5c: 00000000 nop | ||
− | 00187f60: 04410002 bgez r2,0x00187f6c | + | 00187f60: 04410002 bgez r2,0x00187f6c ; (Always true) |
00187f64: 00000000 nop | 00187f64: 00000000 nop | ||
00187f68: 24420003 addiu r2,r2,0x0003 | 00187f68: 24420003 addiu r2,r2,0x0003 | ||
00187f6c: 00021083 sra r2,r2,0x02 | 00187f6c: 00021083 sra r2,r2,0x02 | ||
− | 00187f70: a482002a sh r2,0x002a(r4) | + | 00187f70: a482002a sh r2,0x002a(r4) ; If Separate, store maximum accuracy as 1/4. |
− | 00187f74: 30620060 andi r2,r3,0x0060 | + | 00187f74: 30620060 andi r2,r3,0x0060 ; Check for 'Random' or "Separate" |
00187f78: 10400008 beq r2,r0,0x00187f9c | 00187f78: 10400008 beq r2,r0,0x00187f9c | ||
− | 00187f7c: 30620080 andi r2,r3,0x0080 | + | 00187f7c: 30620080 andi r2,r3,0x0080 ; Useless command. |
00187f80: 3c028019 lui r2,0x8019 | 00187f80: 3c028019 lui r2,0x8019 | ||
00187f84: 8c42f5fc lw r2,-0x0a04(r2) | 00187f84: 8c42f5fc lw r2,-0x0a04(r2) | ||
00187f88: 00000000 nop | 00187f88: 00000000 nop | ||
− | 00187f8c: 10400003 beq r2,r0,0x00187f9c | + | 00187f8c: 10400003 beq r2,r0,0x00187f9c ; If attack not flagged as status, do not check all or nothing. |
− | 00187f90: 30620080 andi r2,r3,0x0080 | + | 00187f90: 30620080 andi r2,r3,0x0080 ; Check for 'All or Nothing' |
00187f94: 34030080 ori r3,r0,0x0080 | 00187f94: 34030080 ori r3,r0,0x0080 | ||
− | 00187f98: 30620080 andi r2,r3,0x0080 | + | 00187f98: 30620080 andi r2,r3,0x0080 ; (Repeats) |
00187f9c: 10400010 beq r2,r0,0x00187fe0 | 00187f9c: 10400010 beq r2,r0,0x00187fe0 | ||
00187fa0: 00008021 addu r16,r0,r0 | 00187fa0: 00008021 addu r16,r0,r0 | ||
Line 38: | Line 38: | ||
00187fac: 3c018019 lui r1,0x8019 | 00187fac: 3c018019 lui r1,0x8019 | ||
00187fb0: 00300821 addu r1,r1,r16 | 00187fb0: 00300821 addu r1,r1,r16 | ||
− | 00187fb4: 90243907 lbu r4,0x3907(r1) | + | 00187fb4: 90243907 lbu r4,0x3907(r1) ; Load status copied from SCUS |
00187fb8: 00701821 addu r3,r3,r16 | 00187fb8: 00701821 addu r3,r3,r16 | ||
00187fbc: 9062001b lbu r2,0x001b(r3) | 00187fbc: 9062001b lbu r2,0x001b(r3) | ||
00187fc0: 26100001 addiu r16,r16,0x0001 | 00187fc0: 26100001 addiu r16,r16,0x0001 | ||
00187fc4: 00441025 or r2,r2,r4 | 00187fc4: 00441025 or r2,r2,r4 | ||
− | 00187fc8: a062001b sb r2,0x001b(r3) | + | 00187fc8: a062001b sb r2,0x001b(r3) ; Store Status to inflict |
00187fcc: 2a020005 slti r2,r16,0x0005 | 00187fcc: 2a020005 slti r2,r16,0x0005 | ||
− | 00187fd0: 1440fff4 bne r2,r0,0x00187fa4 | + | 00187fd0: 1440fff4 bne r2,r0,0x00187fa4 ; Loop |
00187fd4: 00002021 addu r4,r0,r0 | 00187fd4: 00002021 addu r4,r0,r0 | ||
− | 00187fd8: 08062070 j 0x001881c0 | + | 00187fd8: 08062070 j 0x001881c0 ; Inflict Status Routine |
00187fdc: 00000000 nop | 00187fdc: 00000000 nop | ||
− | 00187fe0: 30620040 andi r2,r3,0x0040 | + | 00187fe0: 30620040 andi r2,r3,0x0040 ; Check for "Random" |
00187fe4: 10400030 beq r2,r0,0x001880a8 | 00187fe4: 10400030 beq r2,r0,0x001880a8 | ||
00187fe8: 00008821 addu r17,r0,r0 | 00187fe8: 00008821 addu r17,r0,r0 | ||
Line 67: | Line 67: | ||
00188020: 10600004 beq r3,r0,0x00188034 | 00188020: 10600004 beq r3,r0,0x00188034 | ||
00188024: 00000000 nop | 00188024: 00000000 nop | ||
− | 00188028: ac900000 sw r16,0x0000(r4) | + | 00188028: ac900000 sw r16,0x0000(r4) ; Store value if status can be hit |
0018802c: 24840004 addiu r4,r4,0x0004 | 0018802c: 24840004 addiu r4,r4,0x0004 | ||
00188030: 26310001 addiu r17,r17,0x0001 | 00188030: 26310001 addiu r17,r17,0x0001 | ||
00188034: 26100001 addiu r16,r16,0x0001 | 00188034: 26100001 addiu r16,r16,0x0001 | ||
− | 00188038: 2a020028 slti r2,r16,0x0028 | + | 00188038: 2a020028 slti r2,r16,0x0028 ; Run checks for each status |
− | 0018803c: 1440ffee bne r2,r0,0x00187ff8 | + | 0018803c: 1440ffee bne r2,r0,0x00187ff8 ; Loop |
00188040: 00000000 nop | 00188040: 00000000 nop | ||
− | 00188044: 0c063ba8 jal 0x0018eea0 | + | 00188044: 0c063ba8 jal 0x0018eea0 ; [[Random Process, gives a number between 0-7fff]] |
00188048: 00000000 nop | 00188048: 00000000 nop | ||
0018804c: 00510018 mult r2,r17 | 0018804c: 00510018 mult r2,r17 | ||
− | 00188050: 00001012 mflo r2 | + | 00188050: 00001012 mflo r2 ; Number of statii * Random number |
00188054: 04410002 bgez r2,0x00188060 | 00188054: 04410002 bgez r2,0x00188060 | ||
00188058: 00000000 nop | 00188058: 00000000 nop | ||
0018805c: 24427fff addiu r2,r2,0x7fff | 0018805c: 24427fff addiu r2,r2,0x7fff | ||
− | 00188060: 000213c3 sra r2,r2,0x0f | + | 00188060: 000213c3 sra r2,r2,0x0f ; r2 = 1 if was 0x8000, ELSE, r2 = 0. |
00188064: 00021080 sll r2,r2,0x02 | 00188064: 00021080 sll r2,r2,0x02 | ||
00188068: 03a21021 add r2,r29,r2 | 00188068: 03a21021 add r2,r29,r2 | ||
− | 0018806c: 8c450010 lw r5,0x0010(r2) | + | 0018806c: 8c450010 lw r5,0x0010(r2) ; LOAD first or second status written |
00188070: 3c028019 lui r2,0x8019 | 00188070: 3c028019 lui r2,0x8019 | ||
00188074: 8c422d90 lw r2,0x2d90(r2) | 00188074: 8c422d90 lw r2,0x2d90(r2) | ||
− | 00188078: 04a10002 bgez r5,0x00188084 | + | 00188078: 04a10002 bgez r5,0x00188084 ; Always true, r5 = r16 from the last loop |
0018807c: 00a02021 addu r4,r5,r0 | 0018807c: 00a02021 addu r4,r5,r0 | ||
00188080: 24a40007 addiu r4,r5,0x0007 | 00188080: 24a40007 addiu r4,r5,0x0007 | ||
− | 00188084: 000420c3 sra r4,r4,0x03 | + | 00188084: 000420c3 sra r4,r4,0x03 ; r5 / 8 |
− | 00188088: 00442021 addu r4,r2,r4 | + | 00188088: 00442021 addu r4,r2,r4 ; r2 + r5 / 8 |
0018808c: 30a50007 andi r5,r5,0x0007 | 0018808c: 30a50007 andi r5,r5,0x0007 | ||
00188090: 34020080 ori r2,r0,0x0080 | 00188090: 34020080 ori r2,r0,0x0080 | ||
− | 00188094: 9083001b lbu r3,0x001b(r4) | + | 00188094: 9083001b lbu r3,0x001b(r4) ; Load r3 as r2 + 1b (Inflict Status) + r5 / 8 |
− | 00188098: 00a21007 srav r2,r2,r5 | + | 00188098: 00a21007 srav r2,r2,r5 ; Load Status |
0018809c: 00621825 or r3,r3,r2 | 0018809c: 00621825 or r3,r3,r2 | ||
001880a0: 0806206f j 0x001881bc | 001880a0: 0806206f j 0x001881bc | ||
− | 001880a4: a083001b sb r3,0x001b(r4) | + | 001880a4: a083001b sb r3,0x001b(r4) ; Store First Inflicted Status |
− | 001880a8: 30620020 andi r2,r3,0x0020 | + | 001880a8: 30620020 andi r2,r3,0x0020 ; Check for "Separate" |
001880ac: 10400033 beq r2,r0,0x0018817c | 001880ac: 10400033 beq r2,r0,0x0018817c | ||
001880b0: 00008021 addu r16,r0,r0 | 001880b0: 00008021 addu r16,r0,r0 | ||
Line 109: | Line 109: | ||
001880c8: 3c018019 lui r1,0x8019 | 001880c8: 3c018019 lui r1,0x8019 | ||
001880cc: 00310821 addu r1,r1,r17 | 001880cc: 00310821 addu r1,r1,r17 | ||
− | 001880d0: 90233907 lbu r3,0x3907(r1) | + | 001880d0: 90233907 lbu r3,0x3907(r1) ; Load Status copied from SCUS |
001880d4: 32020007 andi r2,r16,0x0007 | 001880d4: 32020007 andi r2,r16,0x0007 | ||
001880d8: 00539007 srav r18,r19,r2 | 001880d8: 00539007 srav r18,r19,r2 | ||
− | 001880dc: 00721824 and r3,r3,r18 | + | 001880dc: 00721824 and r3,r3,r18 ; Check for equality (Why wouldn't it be?) |
− | 001880e0: 10600012 beq r3,r0,0x0018812c | + | 001880e0: 10600012 beq r3,r0,0x0018812c ; GOTO end if no status |
001880e4: 34040064 ori r4,r0,0x0064 | 001880e4: 34040064 ori r4,r0,0x0064 | ||
− | 001880e8: 0c017833 jal 0x0005e0cc | + | 001880e8: 0c017833 jal 0x0005e0cc ; [[Check if Random is greater/equal to Chance]] |
− | 001880ec: 34050018 ori r5,r0,0x0018 | + | 001880ec: 34050018 ori r5,r0,0x0018 ; Separate = innate 25% |
001880f0: 14400006 bne r2,r0,0x0018810c | 001880f0: 14400006 bne r2,r0,0x0018810c | ||
001880f4: 34020002 ori r2,r0,0x0002 | 001880f4: 34020002 ori r2,r0,0x0002 | ||
Line 122: | Line 122: | ||
001880fc: 8c63f5fc lw r3,-0x0a04(r3) | 001880fc: 8c63f5fc lw r3,-0x0a04(r3) | ||
00188100: 00000000 nop | 00188100: 00000000 nop | ||
− | 00188104: 14620009 bne r3,r2,0x0018812c | + | 00188104: 14620009 bne r3,r2,0x0018812c ; GOTO end if no status added |
00188108: 00000000 nop | 00188108: 00000000 nop | ||
− | 0018810c: 3c018019 lui r1,0x8019 | + | 0018810c: 3c018019 lui r1,0x8019 ; If probability check is successful, GO here. |
00188110: 00310821 addu r1,r1,r17 | 00188110: 00310821 addu r1,r1,r17 | ||
00188114: 90223907 lbu r2,0x3907(r1) | 00188114: 90223907 lbu r2,0x3907(r1) | ||
00188118: 00000000 nop | 00188118: 00000000 nop | ||
− | 0018811c: 00521026 xor r2,r2,r18 | + | 0018811c: 00521026 xor r2,r2,r18 ; Add status only if target does not already have it. |
00188120: 3c018019 lui r1,0x8019 | 00188120: 3c018019 lui r1,0x8019 | ||
00188124: 00310821 addu r1,r1,r17 | 00188124: 00310821 addu r1,r1,r17 | ||
− | 00188128: a0223907 sb r2,0x3907(r1) | + | 00188128: a0223907 sb r2,0x3907(r1) ; Store Status |
− | 0018812c: 26100001 addiu r16,r16,0x0001 | + | 0018812c: 26100001 addiu r16,r16,0x0001 ; Increment r16 |
− | 00188130: 2a020028 slti r2,r16,0x0028 | + | 00188130: 2a020028 slti r2,r16,0x0028 ; Run through all status effects |
− | 00188134: 1440ffe0 bne r2,r0,0x001880b8 | + | 00188134: 1440ffe0 bne r2,r0,0x001880b8 ; Loop |
00188138: 00000000 nop | 00188138: 00000000 nop | ||
0018813c: 00008021 addu r16,r0,r0 | 0018813c: 00008021 addu r16,r0,r0 | ||
Line 146: | Line 146: | ||
0018815c: 26100001 addiu r16,r16,0x0001 | 0018815c: 26100001 addiu r16,r16,0x0001 | ||
00188160: 00441025 or r2,r2,r4 | 00188160: 00441025 or r2,r2,r4 | ||
− | 00188164: a062001b sb r2,0x001b(r3) | + | 00188164: a062001b sb r2,0x001b(r3) ; Load Status effects to be added |
− | 00188168: 2a020005 slti r2,r16,0x0005 | + | 00188168: 2a020005 slti r2,r16,0x0005 ; Run through all status effects to be added |
− | 0018816c: 1440fff4 bne r2,r0,0x00188140 | + | 0018816c: 1440fff4 bne r2,r0,0x00188140 ; Loop |
00188170: 00002021 addu r4,r0,r0 | 00188170: 00002021 addu r4,r0,r0 | ||
− | 00188174: 08062070 j 0x001881c0 | + | 00188174: 08062070 j 0x001881c0 ; Inflict Status Routine |
00188178: 00000000 nop | 00188178: 00000000 nop | ||
− | 0018817c: 30620010 andi r2,r3,0x0010 | + | 0018817c: 30620010 andi r2,r3,0x0010 ; Check for "Cancel" |
00188180: 1040000f beq r2,r0,0x001881c0 | 00188180: 1040000f beq r2,r0,0x001881c0 | ||
00188184: 00002021 addu r4,r0,r0 | 00188184: 00002021 addu r4,r0,r0 | ||
Line 159: | Line 159: | ||
00188190: 3c018019 lui r1,0x8019 | 00188190: 3c018019 lui r1,0x8019 | ||
00188194: 00300821 addu r1,r1,r16 | 00188194: 00300821 addu r1,r1,r16 | ||
− | 00188198: 90243907 lbu r4,0x3907(r1) | + | 00188198: 90243907 lbu r4,0x3907(r1) ; Load Status copied from SCUS |
0018819c: 00701821 addu r3,r3,r16 | 0018819c: 00701821 addu r3,r3,r16 | ||
001881a0: 90620020 lbu r2,0x0020(r3) | 001881a0: 90620020 lbu r2,0x0020(r3) | ||
001881a4: 26100001 addiu r16,r16,0x0001 | 001881a4: 26100001 addiu r16,r16,0x0001 | ||
001881a8: 00441025 or r2,r2,r4 | 001881a8: 00441025 or r2,r2,r4 | ||
− | 001881ac: a0620020 sb r2,0x0020(r3) | + | 001881ac: a0620020 sb r2,0x0020(r3) ; Store status to remove |
− | 001881b0: 2a020005 slti r2,r16,0x0005 | + | 001881b0: 2a020005 slti r2,r16,0x0005 ; Go through all status effects |
− | 001881b4: 1440fff4 bne r2,r0,0x00188188 | + | 001881b4: 1440fff4 bne r2,r0,0x00188188 ; Loop |
001881b8: 00000000 nop | 001881b8: 00000000 nop | ||
001881bc: 00002021 addu r4,r0,r0 | 001881bc: 00002021 addu r4,r0,r0 | ||
Line 177: | Line 177: | ||
001881d8: 90420020 lbu r2,0x0020(r2) | 001881d8: 90420020 lbu r2,0x0020(r2) | ||
001881dc: 26100001 addiu r16,r16,0x0001 | 001881dc: 26100001 addiu r16,r16,0x0001 | ||
− | 001881e0: 00621825 or r3,r3,r2 | + | 001881e0: 00621825 or r3,r3,r2 ; Final value of r3 is that of 1f/24 |
− | 001881e4: 2a020005 slti r2,r16,0x0005 | + | 001881e4: 2a020005 slti r2,r16,0x0005 ; Loop |
001881e8: 1440fff8 bne r2,r0,0x001881cc | 001881e8: 1440fff8 bne r2,r0,0x001881cc | ||
001881ec: 00832025 or r4,r4,r3 | 001881ec: 00832025 or r4,r4,r3 | ||
− | 001881f0: 308200ff andi r2,r4,0x00ff | + | 001881f0: 308200ff andi r2,r4,0x00ff ; r2 = r4 |
001881f4: 10400005 beq r2,r0,0x0018820c | 001881f4: 10400005 beq r2,r0,0x0018820c | ||
001881f8: 00000000 nop | 001881f8: 00000000 nop | ||
− | 001881fc: 0c0612c9 jal 0x00184b24 | + | 001881fc: 0c0612c9 jal 0x00184b24 ; Extra Checks if Status [[Modify Status Inflictions]] or [[Validate Status Changes]] |
00188200: 00002021 addu r4,r0,r0 | 00188200: 00002021 addu r4,r0,r0 | ||
00188204: 14400005 bne r2,r0,0x0018821c | 00188204: 14400005 bne r2,r0,0x0018821c | ||
00188208: 00000000 nop | 00188208: 00000000 nop | ||
− | 0018820c: 0c0610c3 jal 0x0018430c | + | 0018820c: 0c0610c3 jal 0x0018430c ; Set bytes to zero if no status (Should already be 0.) |
00188210: 00000000 nop | 00188210: 00000000 nop | ||
00188214: 0806209a j 0x00188268 | 00188214: 0806209a j 0x00188268 | ||
Line 198: | Line 198: | ||
0018822c: 00000000 nop | 0018822c: 00000000 nop | ||
00188230: 34630008 ori r3,r3,0x0008 | 00188230: 34630008 ori r3,r3,0x0008 | ||
− | 00188234: a0430025 sb r3,0x0025(r2) | + | 00188234: a0430025 sb r3,0x0025(r2) ; Set as status infliction |
00188238: 3c038019 lui r3,0x8019 | 00188238: 3c038019 lui r3,0x8019 | ||
0018823c: 8c632d90 lw r3,0x2d90(r3) | 0018823c: 8c632d90 lw r3,0x2d90(r3) | ||
Line 205: | Line 205: | ||
00188248: 00000000 nop | 00188248: 00000000 nop | ||
0018824c: 30420040 andi r2,r2,0x0040 | 0018824c: 30420040 andi r2,r2,0x0040 | ||
− | 00188250: 10400005 beq r2,r0,0x00188268 | + | 00188250: 10400005 beq r2,r0,0x00188268 ; Ignore if target isn't invited |
00188254: 00000000 nop | 00188254: 00000000 nop | ||
00188258: 94620010 lhu r2,0x0010(r3) | 00188258: 94620010 lhu r2,0x0010(r3) | ||
0018825c: 00000000 nop | 0018825c: 00000000 nop | ||
00188260: 34420040 ori r2,r2,0x0040 | 00188260: 34420040 ori r2,r2,0x0040 | ||
− | 00188264: a4620010 sh r2,0x0010(r3) | + | 00188264: a4620010 sh r2,0x0010(r3) ; Change target team |
00188268: 8fbf00c0 lw r31,0x00c0(r29) | 00188268: 8fbf00c0 lw r31,0x00c0(r29) | ||
0018826c: 8fb300bc lw r19,0x00bc(r29) | 0018826c: 8fb300bc lw r19,0x00bc(r29) |
Revision as of 21:26, 20 December 2020
Note that this is also formula 38 (100% status). It's both a subroutine called by other formulas, and a formula in the formula table.
[38] 00187f24: 3c038019 lui r3,0x8019 00187f28: 90633906 lbu r3,0x3906(r3) 00187f2c: 27bdff38 addiu r29,r29,0xff38 00187f30: afbf00c0 sw r31,0x00c0(r29) 00187f34: afb300bc sw r19,0x00bc(r29) 00187f38: afb200b8 sw r18,0x00b8(r29) 00187f3c: afb100b4 sw r17,0x00b4(r29) 00187f40: 30620020 andi r2,r3,0x0020 ; Check for 'Separate' 00187f44: 1040000b beq r2,r0,0x00187f74 00187f48: afb000b0 sw r16,0x00b0(r29) 00187f4c: 3c048019 lui r4,0x8019 00187f50: 8c842d90 lw r4,0x2d90(r4) 00187f54: 00000000 nop 00187f58: 8482002a lh r2,0x002a(r4) 00187f5c: 00000000 nop 00187f60: 04410002 bgez r2,0x00187f6c ; (Always true) 00187f64: 00000000 nop 00187f68: 24420003 addiu r2,r2,0x0003 00187f6c: 00021083 sra r2,r2,0x02 00187f70: a482002a sh r2,0x002a(r4) ; If Separate, store maximum accuracy as 1/4. 00187f74: 30620060 andi r2,r3,0x0060 ; Check for 'Random' or "Separate" 00187f78: 10400008 beq r2,r0,0x00187f9c 00187f7c: 30620080 andi r2,r3,0x0080 ; Useless command. 00187f80: 3c028019 lui r2,0x8019 00187f84: 8c42f5fc lw r2,-0x0a04(r2) 00187f88: 00000000 nop 00187f8c: 10400003 beq r2,r0,0x00187f9c ; If attack not flagged as status, do not check all or nothing. 00187f90: 30620080 andi r2,r3,0x0080 ; Check for 'All or Nothing' 00187f94: 34030080 ori r3,r0,0x0080 00187f98: 30620080 andi r2,r3,0x0080 ; (Repeats) 00187f9c: 10400010 beq r2,r0,0x00187fe0 00187fa0: 00008021 addu r16,r0,r0 00187fa4: 3c038019 lui r3,0x8019 00187fa8: 8c632d90 lw r3,0x2d90(r3) 00187fac: 3c018019 lui r1,0x8019 00187fb0: 00300821 addu r1,r1,r16 00187fb4: 90243907 lbu r4,0x3907(r1) ; Load status copied from SCUS 00187fb8: 00701821 addu r3,r3,r16 00187fbc: 9062001b lbu r2,0x001b(r3) 00187fc0: 26100001 addiu r16,r16,0x0001 00187fc4: 00441025 or r2,r2,r4 00187fc8: a062001b sb r2,0x001b(r3) ; Store Status to inflict 00187fcc: 2a020005 slti r2,r16,0x0005 00187fd0: 1440fff4 bne r2,r0,0x00187fa4 ; Loop 00187fd4: 00002021 addu r4,r0,r0 00187fd8: 08062070 j 0x001881c0 ; Inflict Status Routine 00187fdc: 00000000 nop 00187fe0: 30620040 andi r2,r3,0x0040 ; Check for "Random" 00187fe4: 10400030 beq r2,r0,0x001880a8 00187fe8: 00008821 addu r17,r0,r0 00187fec: 00008021 addu r16,r0,r0 00187ff0: 34050080 ori r5,r0,0x0080 00187ff4: 27a40010 addiu r4,r29,0x0010 00187ff8: 06010002 bgez r16,0x00188004 00187ffc: 02001021 addu r2,r16,r0 00188000: 26020007 addiu r2,r16,0x0007 00188004: 000210c3 sra r2,r2,0x03 00188008: 3c018019 lui r1,0x8019 0018800c: 00220821 addu r1,r1,r2 00188010: 90233907 lbu r3,0x3907(r1) 00188014: 32020007 andi r2,r16,0x0007 00188018: 00451007 srav r2,r5,r2 0018801c: 00621824 and r3,r3,r2 00188020: 10600004 beq r3,r0,0x00188034 00188024: 00000000 nop 00188028: ac900000 sw r16,0x0000(r4) ; Store value if status can be hit 0018802c: 24840004 addiu r4,r4,0x0004 00188030: 26310001 addiu r17,r17,0x0001 00188034: 26100001 addiu r16,r16,0x0001 00188038: 2a020028 slti r2,r16,0x0028 ; Run checks for each status 0018803c: 1440ffee bne r2,r0,0x00187ff8 ; Loop 00188040: 00000000 nop 00188044: 0c063ba8 jal 0x0018eea0 ; Random Process, gives a number between 0-7fff 00188048: 00000000 nop 0018804c: 00510018 mult r2,r17 00188050: 00001012 mflo r2 ; Number of statii * Random number 00188054: 04410002 bgez r2,0x00188060 00188058: 00000000 nop 0018805c: 24427fff addiu r2,r2,0x7fff 00188060: 000213c3 sra r2,r2,0x0f ; r2 = 1 if was 0x8000, ELSE, r2 = 0. 00188064: 00021080 sll r2,r2,0x02 00188068: 03a21021 add r2,r29,r2 0018806c: 8c450010 lw r5,0x0010(r2) ; LOAD first or second status written 00188070: 3c028019 lui r2,0x8019 00188074: 8c422d90 lw r2,0x2d90(r2) 00188078: 04a10002 bgez r5,0x00188084 ; Always true, r5 = r16 from the last loop 0018807c: 00a02021 addu r4,r5,r0 00188080: 24a40007 addiu r4,r5,0x0007 00188084: 000420c3 sra r4,r4,0x03 ; r5 / 8 00188088: 00442021 addu r4,r2,r4 ; r2 + r5 / 8 0018808c: 30a50007 andi r5,r5,0x0007 00188090: 34020080 ori r2,r0,0x0080 00188094: 9083001b lbu r3,0x001b(r4) ; Load r3 as r2 + 1b (Inflict Status) + r5 / 8 00188098: 00a21007 srav r2,r2,r5 ; Load Status 0018809c: 00621825 or r3,r3,r2 001880a0: 0806206f j 0x001881bc 001880a4: a083001b sb r3,0x001b(r4) ; Store First Inflicted Status 001880a8: 30620020 andi r2,r3,0x0020 ; Check for "Separate" 001880ac: 10400033 beq r2,r0,0x0018817c 001880b0: 00008021 addu r16,r0,r0 001880b4: 34130080 ori r19,r0,0x0080 001880b8: 06010002 bgez r16,0x001880c4 001880bc: 02001021 addu r2,r16,r0 001880c0: 26020007 addiu r2,r16,0x0007 001880c4: 000288c3 sra r17,r2,0x03 001880c8: 3c018019 lui r1,0x8019 001880cc: 00310821 addu r1,r1,r17 001880d0: 90233907 lbu r3,0x3907(r1) ; Load Status copied from SCUS 001880d4: 32020007 andi r2,r16,0x0007 001880d8: 00539007 srav r18,r19,r2 001880dc: 00721824 and r3,r3,r18 ; Check for equality (Why wouldn't it be?) 001880e0: 10600012 beq r3,r0,0x0018812c ; GOTO end if no status 001880e4: 34040064 ori r4,r0,0x0064 001880e8: 0c017833 jal 0x0005e0cc ; Check if Random is greater/equal to Chance 001880ec: 34050018 ori r5,r0,0x0018 ; Separate = innate 25% 001880f0: 14400006 bne r2,r0,0x0018810c 001880f4: 34020002 ori r2,r0,0x0002 001880f8: 3c038019 lui r3,0x8019 001880fc: 8c63f5fc lw r3,-0x0a04(r3) 00188100: 00000000 nop 00188104: 14620009 bne r3,r2,0x0018812c ; GOTO end if no status added 00188108: 00000000 nop 0018810c: 3c018019 lui r1,0x8019 ; If probability check is successful, GO here. 00188110: 00310821 addu r1,r1,r17 00188114: 90223907 lbu r2,0x3907(r1) 00188118: 00000000 nop 0018811c: 00521026 xor r2,r2,r18 ; Add status only if target does not already have it. 00188120: 3c018019 lui r1,0x8019 00188124: 00310821 addu r1,r1,r17 00188128: a0223907 sb r2,0x3907(r1) ; Store Status 0018812c: 26100001 addiu r16,r16,0x0001 ; Increment r16 00188130: 2a020028 slti r2,r16,0x0028 ; Run through all status effects 00188134: 1440ffe0 bne r2,r0,0x001880b8 ; Loop 00188138: 00000000 nop 0018813c: 00008021 addu r16,r0,r0 00188140: 3c038019 lui r3,0x8019 00188144: 8c632d90 lw r3,0x2d90(r3) 00188148: 3c018019 lui r1,0x8019 0018814c: 00300821 addu r1,r1,r16 00188150: 90243907 lbu r4,0x3907(r1) 00188154: 00701821 addu r3,r3,r16 00188158: 9062001b lbu r2,0x001b(r3) 0018815c: 26100001 addiu r16,r16,0x0001 00188160: 00441025 or r2,r2,r4 00188164: a062001b sb r2,0x001b(r3) ; Load Status effects to be added 00188168: 2a020005 slti r2,r16,0x0005 ; Run through all status effects to be added 0018816c: 1440fff4 bne r2,r0,0x00188140 ; Loop 00188170: 00002021 addu r4,r0,r0 00188174: 08062070 j 0x001881c0 ; Inflict Status Routine 00188178: 00000000 nop 0018817c: 30620010 andi r2,r3,0x0010 ; Check for "Cancel" 00188180: 1040000f beq r2,r0,0x001881c0 00188184: 00002021 addu r4,r0,r0 00188188: 3c038019 lui r3,0x8019 0018818c: 8c632d90 lw r3,0x2d90(r3) 00188190: 3c018019 lui r1,0x8019 00188194: 00300821 addu r1,r1,r16 00188198: 90243907 lbu r4,0x3907(r1) ; Load Status copied from SCUS 0018819c: 00701821 addu r3,r3,r16 001881a0: 90620020 lbu r2,0x0020(r3) 001881a4: 26100001 addiu r16,r16,0x0001 001881a8: 00441025 or r2,r2,r4 001881ac: a0620020 sb r2,0x0020(r3) ; Store status to remove 001881b0: 2a020005 slti r2,r16,0x0005 ; Go through all status effects 001881b4: 1440fff4 bne r2,r0,0x00188188 ; Loop 001881b8: 00000000 nop 001881bc: 00002021 addu r4,r0,r0 001881c0: 00008021 addu r16,r0,r0 001881c4: 3c058019 lui r5,0x8019 001881c8: 8ca52d90 lw r5,0x2d90(r5) 001881cc: 00000000 nop 001881d0: 00b01021 addu r2,r5,r16 001881d4: 9043001b lbu r3,0x001b(r2) 001881d8: 90420020 lbu r2,0x0020(r2) 001881dc: 26100001 addiu r16,r16,0x0001 001881e0: 00621825 or r3,r3,r2 ; Final value of r3 is that of 1f/24 001881e4: 2a020005 slti r2,r16,0x0005 ; Loop 001881e8: 1440fff8 bne r2,r0,0x001881cc 001881ec: 00832025 or r4,r4,r3 001881f0: 308200ff andi r2,r4,0x00ff ; r2 = r4 001881f4: 10400005 beq r2,r0,0x0018820c 001881f8: 00000000 nop 001881fc: 0c0612c9 jal 0x00184b24 ; Extra Checks if Status Modify Status Inflictions or Validate Status Changes 00188200: 00002021 addu r4,r0,r0 00188204: 14400005 bne r2,r0,0x0018821c 00188208: 00000000 nop 0018820c: 0c0610c3 jal 0x0018430c ; Set bytes to zero if no status (Should already be 0.) 00188210: 00000000 nop 00188214: 0806209a j 0x00188268 00188218: 00000000 nop 0018821c: 3c028019 lui r2,0x8019 00188220: 8c422d90 lw r2,0x2d90(r2) 00188224: 00000000 nop 00188228: 90430025 lbu r3,0x0025(r2) 0018822c: 00000000 nop 00188230: 34630008 ori r3,r3,0x0008 00188234: a0430025 sb r3,0x0025(r2) ; Set as status infliction 00188238: 3c038019 lui r3,0x8019 0018823c: 8c632d90 lw r3,0x2d90(r3) 00188240: 00000000 nop 00188244: 9062001c lbu r2,0x001c(r3) 00188248: 00000000 nop 0018824c: 30420040 andi r2,r2,0x0040 00188250: 10400005 beq r2,r0,0x00188268 ; Ignore if target isn't invited 00188254: 00000000 nop 00188258: 94620010 lhu r2,0x0010(r3) 0018825c: 00000000 nop 00188260: 34420040 ori r2,r2,0x0040 00188264: a4620010 sh r2,0x0010(r3) ; Change target team 00188268: 8fbf00c0 lw r31,0x00c0(r29) 0018826c: 8fb300bc lw r19,0x00bc(r29) 00188270: 8fb200b8 lw r18,0x00b8(r29) 00188274: 8fb100b4 lw r17,0x00b4(r29) 00188278: 8fb000b0 lw r16,0x00b0(r29) 0018827c: 27bd00c8 addiu r29,r29,0x00c8 00188280: 03e00008 jr r31 00188284: 00000000 nop
Return Locations
00187eb4: Apply status (to action) - (Preserve hit status, evade type, hit %)