Difference between revisions of "OPEN.BIN Data Tables"

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  00067000 - return addresses for [[OPEN.BIN 0006f228 - 0006f594]]
 
  00067000 - return addresses for [[OPEN.BIN 0006f228 - 0006f594]]
 +
 +
80074078 - MDEC(2) - Set Quant Table; Luminance & Colour (0x80 bytes long)
 +
800740fc - MDEC(3) - Set Scale Table (0x80 bytes long)
 +
  
 
  80074180 - hardware I/O ports
 
  80074180 - hardware I/O ports

Revision as of 06:47, 11 December 2024

OPEN.BIN Routines

00067000 - return addresses for OPEN.BIN 0006f228 - 0006f594
80074078 - MDEC(2) - Set Quant Table; Luminance & Colour (0x80 bytes long)
800740fc - MDEC(3) - Set Scale Table (0x80 bytes long)

80074180 - hardware I/O ports
    - 80074180: DMA0 base address
    - 80074184: DMA0 block control
    - 80074188: DMA0 channel control
    - 8007418c: DMA1 base address
    - 80074190: DMA1 block control
    - 80074194: DMA1 channel control
    - 80074198: DMA2 base address
    - 8007419c: DMA2 block control
    - 800741a0: DMA2 channel control
    - 800741a4: DMA3 base address
    - 800741a8: DMA3 block control
    - 800741ac: DMA3 channel control
    - 800741b0: MDEC0 command/parameter register & data response
    - 800741b4: MDEC1 status register (bitmask)
           0x80000000: data-out "fifo" empty
           0x40000000: data-in "fifo" full
           0x20000000: command busy
           0x10000000: data-in request allowed
           0x08000000: data-out request allowed
           0x06000000: data output depth (0=4bit, 2=8bit, 4=24bit, 6=15bit)
           0x01000000: data output signed
           0x00800000: if 15 bit depth; data output bit 15
           0x00780000: unused
           0x00070000: current block
           0x0000ffff: No. param words remaining
    - 800741b8: DPCR DMA control register
           (full word) list of priorities and enabled/disabled flags for every DMA -> MDEC channel